1234567Charge Pump-++-141312111098+INL-INLOUTLUVPGNDVDDCP
Figure 1 Pin Assignment_TSSOP14 Pin Description PIN I/O Name +INR -INR OUTR GND Mute VSS CN CP VDD UVP OUTL -INL +INL NO. 1 2 3 4， 10 5 6 7 8 9 11 12 13 14 I I O P I P I/O I/O P I O I I Right-channel positive input Right-channel negative input Right-channel output Ground Mute input, active-low Supply voltage Charge-pump flying capacitor negative terminal Charge-pump flying capacitor positive terminal Positive supply Under voltage protection input Left-channel output Left-channel negative input Left-channel positive input Description WWW.DIOO.COM © 2011 DIOO MICROCIRCUITS CO., LTD DIO2112H • Rev. 0.1 2DIO2112H Ordering Information Order Part Number DIO2112HTP14 Top Marking DIO2112H Rohs Yes TA -40 to +85°C TSSOP-14 Package Tape & Reel, 2500 Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Rating” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maxim rating conditions for extended periods may affect device reliability. Parameter Supply Voltage Input Voltage Minimum load impedance EN to GND Storage Temperature Range Junction Temperature TSSOP-14 ӨJA HBM ESD, JEDEC: JESD22-A114 Rating -0.3 to 4 VSS-0.3 to VDD+0.3 600 -0.3 to VDD+0.3 -65 to 150 150 110 5 Unit V V Ω V °C °C °C/W kV Recommend Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation to ensure optimal performance to the datasheet specifications. DIOO does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VDD VIH VIL TA Parameter Supply Voltage Mute High level Input Voltage Mute Low level Input Voltage Operating Temperature Range Min. 3 -40 Typ. 3.3 60 40 Max. 3.6 85 Unit V % of VDD % of VDD °C WWW.DIOO.COM © 2011 DIOO MICROCIRCUITS CO., LTD DIO2112H • Rev. 0.1 3DIO2112H Electrical Characteristics Typical value: TA = 25°C, unless otherwise specified. Symbol VOS PSRR VOH VOL IIH IIL Parameter Output Offset Voltage Power supply rejection ratio High level output voltage Low level output voltage Mute High level input current Mute Low level input current Conditions VDD=3.3V, Input grounded, Unity gain VDD=3.3V VDD=3.3V, RL=10kΩ VDD=3.3V, RL=10kΩ VDD=3.3V, VI=VDD VDD=3.3V, VI=0V VDD=3.3V, VI= VDD, No load Min. 3.1 Typ. 0.9 90 14 0.8 Max. -3.05 1 1 Unit mV dB V V µA µA IDD Supply current Mute mode, VDD=3.3V mA Operating Characteristics Typical value: TA=25°C, VDD=3.3V, RL=10kΩ, CPUMP=CPVSS=1µF, CIN=10µF, RIN=15kΩ, Rfb=30kΩ, unless otherwise specified. Symbol VO THD+N XTALK SNR CL VN GBW AVO VUVP Parameter Output Voltage Total harmonic distortion + noise Channel crosstalk Signal noise ratio Maximum capacitive load Noise output voltage Unity gain bandwidth Open loop voltage gain External under-voltage detection External under-voltage detection hysteresis current Charge pump frequency Conditions THD=1%, VDD=3.3V, f=1kHz VO=2VRMS, f=1kHz VO=2VRMS, f=1kHz VO=2VRMS, BW=22kHz A-weighted BW=20Hz to 22kHz Min. 2.05 90 Typ. 2.4 0.0005 -105 105 220 10 6.5 165 1.25 Max. Unit VRMS % dB dB pF µVRMS MHz dB V IHys 6 µA fCP 300 kHz WWW.DIOO.COM © 2011 DIOO MICROCIRCUITS CO., LTD DIO2112H • Rev. 0.1 4DIO2112H Application Circuit RIGHTINPUT
LEFTINPUT
C3R1C3R1C3R1C3R1C2R3R2R2R3C2C1R3R2C1R3R2DIO2112H+INR-INRC1+INL-INLC1RIGHT OUTPUT
OUTRGNDOUTLUVPGNDVDDCP3.3V Supply1µFR13R12R11GPIO Mute MuteVSS1µFCN1µFDifferential-input, single-ended output, second-order filter R1=15kΩ, R2=30kΩ, R3=43kΩ, C1=47pF, C2=180pF WWW.DIOO.COM © 2011 DIOO MICROCIRCUITS CO., LTD DIO2112H • Rev. 0.1 5-LEFT OUTPUTSystem Supply
+
-+
DIO2112H Application Information Gain-Setting Resistors Ranges and Input-Blocking Capacitors The gain-setting resistors, RIN and RFB, must be chosen so that noise, stability, and input capacitor size of the DIO2112H are kept within acceptable limits. Voltage gain is defined as RFB divided by RIN. Table 1 lists the recommended resistor value for different gain settings. Selecting values that are too low demands a large input ac-coupling capacitor CIN. Selecting values that are too high increases the noise of the amplifier. The gain-setting resistor must be placed close to the input pins to minimize capacitive loading on these input pins and to ensure maximum stability. Table 1 Resistor Values Recommended Input Res., RIN 22 kΩ 15 kΩ 10 kΩ Feedback Res., Rfb 22 kΩ 30 kΩ 100 kΩ Differential Gain 1 V/V 2 V/V 10 V/V Inverting Gain -1 V/V -2 V/V -10 V/V Non-inverting Gain 2 V/V 3 V/V 11 V/V CxRINRFB-INCINRINRFB +INNon-inverting-+Inverting-+ CINRxCIN-INRINRFB Differential Input-++INCINRINRFB Figure 2 Differential, Inverting and Non-inverting Gain Configurations DC input-blocking capacitors are required to be added in series with the audio signal into the input pins of the DIO2112H. These capacitors block the dc portion of the audio source and allow the DIO2112H inputs to be properly biased to provide maximum performance. 2nd Order Filter Typical Application Several audio DACs used today require an external low-pass filter to remove out-of-band noise. This is possible with the DIO2112H, as it can be used like a standard OPAMP. Several WWW.DIOO.COM © 2011 DIOO MICROCIRCUITS CO., LTD DIO2112H • Rev. 0.1 6DIO2112H filter topologies can be implemented, both single-ended and differential. In Figure 3, a multi-feedback (MFB) with differential input and single-ended input is shown. An ac-coupling capacitor to remove dc content from the source is shown; it serves to block any dc content from the source and lowers the dc-gain to 1, helping reducing the output dc-offset to minimum. The resistor values should have a low value for obtaining low noise, but should also have a high enough value to get a small size ac-coupling capacitor. C3 -IN Differential Input +IN C3 R2R1R3C1R2C3-INR1R3C1-C2+-Iverting InputC2+R1R3C1R2 Figure 3 Second-Order Active Low-Pass Filter Charge Pump Flying Capacitor and VSS Capacitor The charge pump flying capacitor serves to transfer charge during the generation of the negative supply voltage. The VSS capacitor must be at least equal to the charge pump capacitor in order to allow maximum charge transfer. Low-ESR capacitors are an ideal selection, and a value of 1 µF is typical. Capacitor values that are smaller than 1 µF can be used, but the maximum output voltage may be reduced and the device may not operate to specifications. Decoupling Capacitors The DIO2112H requires adequate power supply decoupling to ensure that the noise and total harmonic distortion (THD) are low. A good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1µF, placed as close as possible to the device VDD lead works best. Placing this decoupling capacitor close to the DIO2112H is important for the performance of the amplifier. For filtering lower-frequency noise signals, a 10µF or greater capacitor placed near the audio power amplifier would also help, but it is not required in most applications because of the high PSRR of this device. Pop-Free Power-Up Pop-free power up is ensured by keeping the Mute (shutdown pin) low during power-supply ramp up and ramp down. The Mute pin should be kept low until the input ac-coupling capacitors are fully charged before asserting the Mute pin high to achieve pop-less power up. Figure 4 illustrates the preferred sequence. WWW.DIOO.COM © 2011 DIOO MICROCIRCUITS CO., LTD DIO2112H • Rev. 0.1 7DIO2112H SupplyMute
Supply Ramp
Time for AC-Coupling capacitors to charge
Figure 4 Power-Up Sequences External Under-voltage Detection External under-voltage detection can be used to mute/shut down the DIO2112H before an input device can generate a pop. The shutdown threshold at the UVP pin is 1.25 V. The user selects a resistor divider to obtain the shutdown threshold and hysteresis for the specific application. The thresholds can be determined as follows: VUVP=(1.25V-7uA*R13)*(R11+R12)/R12; Vhysteresis=6uA*R13*(R11+R12)/R12; With the condition R13>>R11//R12. For example, if R11=3k, R12=2k and R13=20k, Then VUVP=2.78V; Vhysteresis=0.3V CyR12R11R13UVP pin 11VSUP_MOCapacitive Load The DIO2112H has the ability to drive a high capacitive load up to 220 pF directly. Higher capacitive loads can be accepted by adding a series resistor of 47 Ω or larger. WWW.DIOO.COM © 2011 DIOO MICROCIRCUITS CO., LTD DIO2112H • Rev. 0.1 8DIO2112H Physical Dimension: TSSOP-14 Symbol D E b c E1 A A2 A1 e L H Θ WWW.DIOO.COM © 2011 DIOO MICROCIRCUITS CO., LTD DIO2112H • Rev. 0.1 9 Dimensions In Millimeters Min 4.900 4.300 0.190 0.090 6.250 0.800 0.05 0.500 1° Max 5.100 4.500 0.300 0.200 6.550 1.200 1.000 0.150 0.700 7° Dimensions In Inches Min 0.193 0.169 0.007 0.004 0.246 0.031 0.002 0.020 1° Max 0.201 0.177 0.012 0.008 0.258 0.047 0.039 0.006 0.028 7° 0.65 (BSC) 0.25 (TYP) 0.026 (BSC) 0.01 (TYP) DIO2112H Contact Us： Dioo is a professional design and sales corporation for high-quality and performance analog semiconductors. The company focuses on industry markets, such as, cell phone, handheld products, laptop, and medical equipments and so on. Dioo’s product families include analog signal processing, amplifying, LED divers and charger IC. Go to http://www.dioo.com for a complete list of Dioo product families. For additional product information, or full datasheet, please contact with our Sales Department or Representatives. WWW.DIOO.COM © 2011 DIOO MICROCIRCUITS CO., LTD DIO2112H • Rev. 0.1 10
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